May 12, 2006 · pmos pass transistor Hi, all I am designing a LDO regulator, the minimal power supply voltage is 4.75V, and the output voltage is 4.5V, the maximum output current is 20mA. In order to …

Mar 27, 2019 · Hi I am working on a LDO design that requires a rather large PMOS pass transistor due to the specified max current. I have issues with pulling the pass transistor gate high enough at no …

Mar 14, 2012 · I have done LDO design. Input voltage is 2-2.4 V Output voltage=1.8v. maximum load current=50mA I m getting this output voltage but Pmos pass transistor is going to sub threshold …

Jan 27, 2012 · Re: LDO vs Level shifter Yes, although if good efficiency and good noise performance were required, I would use a switcher to drop most of the voltage then use the LDO to regulate to the …

Feb 2, 2005 · nmos ldo compensation but in Low Drop-Out Regulator, Pmos is used to achieve lower voltage drop. how can Pmos do that other than Nmos?it seems that lower Ron is not the reason.

Apr 2, 2006 · ldo frequency and transient response Some commercial chips like TI's add comparators to control overshoot and undershoot. When undershoot is detected, sourcing current will be increased …

Apr 22, 2024 · I'm looking to minimize the frequency variation of an on-chip ring oscillator running at 2MHz, through using either an LDO as its supply voltage, or current-starving it with a current coming …

Jul 11, 2005 · For a LDO, I think the most important part is the opamp. So, only the opamp need to be described with verilog-a language. Spectre provide a lot of behavioral module in its ahdlLib and you …

Sep 24, 2008 · how to measure psrr hi,all. Can anybody suggest me how to measure psrr of LDO? Could anybody suggest the ways and the required instruments I need to use? Thanks a lot.

Oct 23, 2019 · So in my opinion, having a cascode/folded-cascode EA will simply boost the EA's open loop gain, thus improving the overall PSRR of your LDO. I prefer to over-design my EA with very high …